FPGA Solutions for Industrial Automation & Robotics
PRM.DEV designs FPGA-based industrial solutions for robotics, energy, and automation. This approach removes performance bottlenecks, makes it easier to adapt logic to changing requirements, and reduces risk when MCUs and DSPs hit their limits. Working with global vendors and proven IP, we deliver the full cycle — from architecture and HDL to bring-up, debugging, and on-site deployment.
Our FPGA case examples
IP cores: ADC_RX, PI/PID, PWM, 2p2z/3p3z compensator, LPF, power calculation
We build high-power, fault-tolerant AC/DC converters that go beyond the capabilities of typical MCUs.
We build high-power, fault-tolerant AC/DC converters that go beyond the capabilities of typical MCUs.
IP cores: PI/PID, first harmonic detector, ADC_RX, PWM
Active higher-harmonic filtering by subtracting the first harmonic from the load current to compute compensation currents.
Active higher-harmonic filtering by subtracting the first harmonic from the load current to compute compensation currents.
IP cores: RMS, SAG/SWELL, cosφ, S/Q/P, period/phase, FFT/filter, IRQ/memory/ADC_RX, ZCR, register file.
A reusable platform for PQ analytics across different hardware bases.
A reusable platform for PQ analytics across different hardware bases.
IP cores: PID, ADC_RX, encoder, SVPWM, PWM, Clarke/Park/HPF + inverse
Programmable logic for DSP, control, and data storage in a single chip.
Programmable logic for DSP, control, and data storage in a single chip.
IP cores: register file, AXI DMA, CPACK, RX JESD TPL/LINK, JESD PHY, SYNC, TIA sequencer, PWM, motor control, laser driver, memory interconnect, PCIe
Specs:
Specs:
- 16-pixel horizontal resolution
- up to 1 GSPS sampling on 4 channels
- Class 1 laser safety compliance
- FMC connector for any FPGA board
DAQ board: AD9094 (4-channel ADC), sync/clocking, FMC interface
Laser board: 4 lasers with drivers and power, optional FAC optics
AFE board: 16-channel APD, 4× LTC6561 (Quad TIA), standard optical mounts
Laser board: 4 lasers with drivers and power, optional FAC optics
AFE board: 16-channel APD, 4× LTC6561 (Quad TIA), standard optical mounts
IP cores: ADC_RX, PI/PID, LFD, reference current and power calculation, PWM.
Interleaving boost stages under load to reduce ripple and improve efficiency.
Interleaving boost stages under load to reduce ripple and improve efficiency.
IP cores: PID, ADC_RX, encoder, SVPWM, PWM, Clarke/Park/HPF + inverse
Precise real-time position and speed control for robotics and drives.
Precise real-time position and speed control for robotics and drives.
IP cores: EnDat 3, HIPERFACE DSL, SCS Open Link
“Black-channel” digital position interfaces (without safety assessment) to simplify integration.
“Black-channel” digital position interfaces (without safety assessment) to simplify integration.
IP cores: ADC_RX, PI/PID, PWM, 2p2z/3p3z, MPPT
DC/DC converters for automation and energy with maximum power point tracking.
DC/DC converters for automation and energy with maximum power point tracking.
IP cores: Clarke, Park, HPF, inverse Park, inverse Clarke, ADC_RX
Compensation and analytics for three-phase systems with or without neutral, based on instantaneous power theory.
Compensation and analytics for three-phase systems with or without neutral, based on instantaneous power theory.
IP cores: input driver, comparators, registers, output stage
Real-time safety logic execution to protect personnel and equipment, compliant with modern standards.
Real-time safety logic execution to protect personnel and equipment, compliant with modern standards.
IP cores: PID, ADC_RX, encoder, SVPWM, PWM, Clarke/Park/HPF + inverse
Higher efficiency and lower distortion using a three-level inverter topology.
Higher efficiency and lower distortion using a three-level inverter topology.
Functions: error injection for standalone simulation, IEEE Std C37.94-2017 compatibility, 1–12 time slots, master/slave, internal CDR, status flags.
IP cores: PID, ADC_RX, SVPWM, PWM, Clarke/Park/HPF + inverse
Rotor position and speed estimation from electrical signals — fewer sensors without sacrificing control quality.
Rotor position and speed estimation from electrical signals — fewer sensors without sacrificing control quality.
IP cores: PI/PID, inverse Park/Clarke, Sin/Cos
Sensorless rotor position estimation — for robotics and transport.
Sensorless rotor position estimation — for robotics and transport.
IP cores: sensored FOC BLDC, inkjet controller, PCIe
Separated logic: dedicated IP for paper feed speed and RAW image transfer — easier upgrades.
Separated logic: dedicated IP for paper feed speed and RAW image transfer — easier upgrades.
IP cores: ADC_RX, PI/PID, PWM, Notch filter, Sin/Cos, current calculation, GPIO
High-power FPGA inverter solutions beyond typical MCUs and DSPs.
High-power FPGA inverter solutions beyond typical MCUs and DSPs.
IP cores: PCIe, 6 servo drives
Up to six servo IP blocks on a single FPGA for high precision and dynamics.
Up to six servo IP blocks on a single FPGA for high precision and dynamics.
IP cores: RGMII, loopback, async FIFO, AXIS switch, FMMU, SM, DPRAM, time module, memory controller
Fast, precise communication for industrial automation over Ethernet fieldbus.
Fast, precise communication for industrial automation over Ethernet fieldbus.
IP cores: RMS, SAG/SWELL, cosφ, S/Q/P power, period/phase, timer, predictive control, FFT/filter, IRQ/memory/ADC_RX, ATS logic, ZCR
A flexible, reliable FPGA-based ATS implementation instead of an MCU/DSP.
A flexible, reliable FPGA-based ATS implementation instead of an MCU/DSP.
IP cores: ADC_RX, LPF, Fourier, register file, PID/PI, sine synthesis, SUM, ZCR, drive control, DAC_TX, synthesis and balance calculations
High-accuracy direct mass flow measurement based on the Coriolis effect.
High-accuracy direct mass flow measurement based on the Coriolis effect.
IP cores: servo clocks, MAX, IEEE 1588 MAC, DEMUX, tagger/untagger, mux/queue, interconnect, 3× PDelay response, timestamp/correction TX/RX, frame parsing
Zero frame loss under network failures (PRP/HSR per IEC 62439-3) for mission-critical systems.
Zero frame loss under network failures (PRP/HSR per IEC 62439-3) for mission-critical systems.
Our FPGA vendors
Lattice Semiconductor
- iCE40 — ultra-compact FPGAs
- MachXO3 — control and security
- ECP5 — high-speed interfaces and data processin
AMD
- SoC FPGAs: Zynq™ UltraScale+™, Zynq™-7000, Versal™
- FPGAs without CPU: Kintex™, Spartan™, Artix™, Virtex™, XC series
- Tools: Vivado™ Design Suite, Vitis™
Altera
- Agilex®, Arria®, Cyclone®, Stratix®, MAX®
- IP blocks, high-speed transceivers and I/O, embedded SRAM
- Tools: Quartus® Prime for optimising time, cost, and power
Microchip
- FPGAs: PolarFire® Mid-Range, IGLOO® 1/2, ProASIC®3, Fusion Mixed-Signal
- SoC FPGAs: PolarFire®, SmartFusion® 1/2
- Radiation-tolerant and antifuse FPGA families
Technology stack
- HardwareHigh-speed and power boards, DDR4, JESD204B, SDI, SI/PI, thermal simulation
- FPGA / SoC familiesZynq / Zynq UltraScale+, Cyclone V SoC, Cyclone 10, ECP5, Microchip PolarFire (MPF500)
- Encoders and sensorsSSI, BiSS, Hiperface DSL, EnDat; absolute and incremental encoders
- EDA toolsVitis/Vivado, Quartus Prime, Libero, Diamond, Matlab/Simulink
- AI platforms and accelerationNVIDIA Jetson, AMD Alveo, OpenVINO, TensorFlow, Keras, Caffe
- FieldbusesEtherCAT, PROFINET, EtherNet/IP, DeviceNet
- Soft-CPUNios/Nios II, MicroBlaze, RISC-V (VexRiscv, etc.), MIPS, OpenRISC
- Network interfaces10/100/1000, 10G
Ready to discuss your FPGA challenge? Message us — and we’ll propose the best solution.
Our offices
Moscow
Troparyovskaya St., 4, bld. 1, room 6A
Moscow 119602, Russian Federation
Moscow 119602, Russian Federation
Innopolis
Universitetskaya St., 7, room 7
420500, Innopolis, Republic of Tatarstan
420500, Innopolis, Republic of Tatarstan
Contact us to discuss your engineering challenges
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